Prof. Dr. Marco Platzner

Technische Informatik

Kontakt und Affiliationen

Büro­anschrift:
Pohlweg 51
33098 Paderborn
Raum:
O3.207
Sprechstunden:

by appointment

Büro­anschrift:
Pohlweg 51
33098 Paderborn
Raum:
O3.207
Sprechstunden:

by appointment

Leiter - Professor
Stellvertretender Sprecher - Professor
Teilprojektleiter
Büro­anschrift:
Pohlweg 51
33098 Paderborn
Raum:
O3.207
Sprechstunden:

by appointment

Publikationen

Aktuelle Publikationen

Empirical QoR Estimation Flow for Fast Design Space Exploration of DNN Dataflow Accelerators

F. Jentzsch, M. Platzner, in: 2025 International Conference on Field Programmable Technology (ICFPT), IEEE, 2026.


DP-MCTS: Deep Playout-Driven MCTS for Approximate Accelerator Design

M. Awais, H.G. Mohammadi, S.M. Jawadi, M. Platzner, in: 2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2026.


A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation

A.H. Hadipour, A. Jafari, M. Awais, M. Platzner, in: 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2025.


Post-configuration Activation of Hardware Trojans in FPGAs

Q.A. Ahmed, T. Wiersema, M. Platzner, Journal of Hardware and Systems Security (2024).


FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers

C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, H. Giefers, in: 2024.


Alle Publikationen anzeigen

Lehre


Laufende Lehrveranstaltungen

  • Systementwurf-Teamprojekt
  • Reconfigurable Computing (in English)