Jan Dennis Reimer, M.Sc.
Doktorand - Forschung, Lehre
Telefon:
+49 5251 60-3922
E-Mail:
Büro:
P1.6.08.4
Besucher:
Pohlweg 47-49
33098 Paderborn
33098 Paderborn
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2023
Approximate Computing: Balancing Performance, Power, Reliability, and Safety
A.. Badran, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, in: To appear: 28th IEEE European Test Symposium (ETS'23), May 2023, 2023
On Cryptography Effects on Interconnect Reliability
A. Ghazal, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, 35. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen" (TuZ'23), Feb. 2023, 2023, pp. 2
2020
Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study
A. Sprenger, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, in: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, 2020
Logic Fault Diagnosis of Hidden Delay Defects
S. Holst, M. Kampmann, A. Sprenger, J.D. Reimer, S. Hellebrand, H. Wunderlich, X. Weng, in: IEEE International Test Conference (ITC'20), November 2020, 2020