Projects from Kai Arne Hannemann, M.Sc.
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1 projects were found
Scalable RISC-V Multi/Many-Core Processor Systems
The System and Circuit Technolgy Group has been involved in the design and analysis of RISC-V processors for several years. In 2017, it was the co-maintainer of the first RISC-V implementation of the QEMU CPU emulator (https://www.uni-paderborn.de/projekt/304) in cooperation with SiFive and TI. As partner of the Safe4I ...
Duration: 01/2021 - 12/2028