Hardware Design with Open-Source EDA Tools and PDKs

Overview

Professional chip design is currently based on commercial EDA design tools, costs and maintenance of which requires significant investment for universities and smaller start-ups. Further problems exist in the field of education when using commercial tools and PDKs (process development kits) for chip development, as they are protected by NDAs (non-disclosure agreements) and technical details are not open for publication.

 

The System and Circuit Technology Group has been working on the application of open source EDA frameworks and tools for some time. In the past, a large number of studies were carried out with QEMU on fault injection and time-annotated fast fault simulation (https://www.uni-paderborn.de/projekt/304). The aim of the current work is to provide an EDA development environment that is as open source as possible, based on low-cost components and an open source PDK for university and private use. The applications focus on the development of RISC-V-based processors and the UC Berkeley Chipyard framework within the framework of Verilator, FireSim, FPGAs, and the Hammer ASIC design flow in conjunction with the open-source PDK from IHP (SG13G2 and SG13COMS5L).

 

In this area, detailed studies and the combined use of SystemC and Chipyard were carried out in cooperation with UC Irvine/USA. In larger case studies, by the means of the GPC processor architecture and non-trivial software applications (TokenX, ParticleSim, FFT), various hardware configurations at various levels of abstraction were modeled and analyzed, primarily using open-source tools. In cooperation with the Paderborn Center of Parallel Computing, various configurations of the Chipyard framework with focus on Verilator, FireSim, and FireAxe are being implemented on the Noctua2 HPC cluster. In cooperation with IHP, automation solutions for combined FPGA and ASIC design flows are being developed based on StandardRV32/64 RocketChip processor architectures with Arty7 and the SG13CMOS5L PDK as the target platform. Furthermore, case studies on the design of analog components (PLL, oscillators, LVDS) using open source tools are being conducted: ngspice, Xyce, Xschem, Klayout.

Key Facts

Research profile area:
Intelligente Technische Systeme
Project type:
Forschung
Project duration:
07/2024 - 12/2028
Contribution to sustainability:
Industry, innovation, and infrastructure

More Information

Principal Investigators

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apl. Prof. Dr. Wolfgang Müller

System and Circuit Technology / Heinz Nixdorf Institut

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Project Team

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Kai Arne Hannemann, M.Sc.

System and Circuit Technology / Heinz Nixdorf Institut

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Lars Luchterhandt

System and Circuit Technology / Heinz Nixdorf Institut

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Babak Sadiye, M.Sc.

System and Circuit Technology / Heinz Nixdorf Institut

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Cooperating Institutions

IHP GmbH - Innovations for High Performance Microelectronics

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