Scalable RISC-V Multi/Many-Core Processor Systems

The System and Circuit Technolgy Group has been involved in the design and analysis of RISC-V processors for several years. In 2017, it was the co-maintainer of the first RISC-V implementation of the QEMU CPU emulator (https://www.uni-paderborn.de/projekt/304) in cooperation with SiFive and TI. As partner of the Safe4I ...

Duration: 01/2021 - 12/2028

Scale4Edge: Scalable infrastructure for edge computing

Scale4Edge is a joint project funded by the BMBF (Federal Ministry of Education and Research), which aims to significantly reduce the currently relatively long development times and high development costs of application-specific edge components (platform concept). The approach pursued in the project is based on providing a commercial ecosystem for ...

Duration: 05/2020 - 12/2025

Contact: apl. Prof. Dr. Wolfgang Müller

SAFE4I- Cost-Efficient Smart System Software Synthesis

Industrial manufacturing is being driven forward in many areas by Industry 4.0 and by the Internet of Things. In this context, corresponding standards for functional safety (safety), such as IEC 61511 and IEC EN 61508, require not only the safeguarding of the automation solution as a whole, but also the safeguarding of components and subsystems. ...

Duration: 10/2017 - 12/2021

Contact: Bastian Koppelmann, apl. Prof. Dr. Wolfgang Müller

COMPACT - Cost-Efficient Smart System Software Synthesis

Seit 2017 fördert das Bundesministerium für Bildung und Forschung das COMPACT-Projekt. Das COMPACT-Projekt ist eine branchenweite Anstrengung, um neue Techniken für einen schnellen, effizienten und strukturierten Entwurf und den Betrieb von extrem kleinen konfigurierbaren IoT-Knoten mit extrem kleinen Speicherbedarf und extrem hoher ...

Duration: 09/2017 - 08/2020

Contact: Peer Adelt, apl. Prof. Dr. Wolfgang Müller

RISC-V Virtual Prototyping with QEMU

In 2017, the Circuit Design Group initially collaborated with SiFive and TI as co-maintainers of the first RISC-V implementation within the QEMU CPU emulator. QEMU is an open-source CPU emulator that supports a variety of instruction set architectures for executing compiled software. The specialist group can draw on extensive experience in this ...

Duration: 08/2017 - 12/2024

Contact: apl. Prof. Dr. Wolfgang Müller

SPEED - Silicon Photonics Enabling Exascale Data Networks

With the growing demand for centralized data storage and processing large data centers have become an integral part of the strategy of large content and service providers such as Google, Amazon, Microsoft etc. Currently mega-data-centers in the size of large storehouses are built and evolve more and more to crosspoints of the global IT ...

Duration: 10/2015 - 09/2018

Contact: Sergiy Gudyriev, M.Sc., Mohammed Iftekhar, M.Sc., apl. Prof. Dr. Wolfgang Müller

EffektiV: Virtual Stresstests for Robots

Manufacturing plants of the future, the so-called cyber-physical Production Systems (CPPS), are highly complex, intelligent systems, which consist of a large number of heterogeneous components: software, microelectronics, power electronics, sensors, actuators. In this context, motion control systems, which form the core of those systems, coordinate ...

Duration: 06/2014 - 05/2017

Contact: apl. Prof. Dr. Wolfgang Müller