Dr. Heinrich Riebler

Member - PostDoc

High-Performance Computing
Member - PostDoc
Paderborn Center for Parallel Computing (PC2)
Member - PostDoc
Scientific Advisor FPGA Acceleration
E-Mail:
heinrich.riebler@uni-paderborn.de
Phone:
+49 5251 60-5382
Web:
Homepage
Office Address:
Mersinweg 5
33100 Paderborn
Room:
X0.128

Publications

Latest Publications

Noctua 2 Supercomputer
C. Bauer, T. Kenter, M. Lass, L. Mazur, M. Meyer, H. Nitsche, H. Riebler, R. Schade, M. Schwarz, N. Winnwa, A. Wiens, X. Wu, C. Plessl, J. Simon, Journal of Large-Scale Research Facilities 9 (2024).
DOI PDF
Compute Centers I: Heterogeneous Execution Environments
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, C. Plessl, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 165–182.
DOI PDF
A computation of D(9) using FPGA Supercomputing
L. Van Hirtum, P. De Causmaecker, J. Goemaere, T. Kenter, H. Riebler, M. Lass, C. Plessl, ArXiv:2304.03039 (2023).
arXiv
Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, ACM Trans. Archit. Code Optim. (TACO) 16 (2019) 14:1–14:26.
DOI
Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs
H. Riebler, Efficient Parallel Branch-and-Bound Search on FPGAs Using Work Stealing and Instance-Specific Designs, 2019.
DOI
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