Dr.-Ing. Matthias Kampmann

Kontakt

Publikationen

Datentechnik (DATE)

Mitglied - Wissenschaftlicher Mitarbeiter - Forschung, Lehre

VCard

Telefon:

+49 5251 60-3921

Fax:

+49 5251 60-4221

E-Mail:

matkam(at)mail.upb(dot)de

Büro:

P1.6.08.3

Web:

Homepage

Besucher:

Pohlweg 47-49
33098 Paderborn

Studienberatung Elektrotechnik (Studi.ET)

Mitglied - Wissenschaftlicher Mitarbeiter - Fachstudienberater Computer Engineering (bis 30.11.2020)

VCard

Telefon:

+49 5251 60-3202

E-Mail:

studienberatung(at)ei.upb(dot)de

Büro:

P1.3.38

Sprechzeiten:

http://studi.et.upb.de

Web:

Homepage

Besucher:

Pohlweg 47-49
33098 Paderborn

Liste im Research Information System öffnen

2020

Logic Fault Diagnosis of Hidden Delay Defects

S. Holst, M. Kampmann, A. Sprenger, J.D. Reimer, S. Hellebrand, H. Wunderlich, X. Weng, in: IEEE International Test Conference (ITC'20), November 2020, 2020

2019

Built-in Test for Hidden Delay Faults

M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, H. Wunderlich, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) (2019), 38(10), pp. 1956 - 1968

Abstract

Marginal hardware introduces severe reliability threats throughout the life cycle of a system. Although marginalities may not affect the functionality of a circuit immediately after manufacturing, they can degrade into hard failures and must be screened out during manufacturing test to prevent early life failures. Furthermore, their evolution in the field must be proactively monitored by periodic tests before actual failures occur. In recent years small delay faults have gained increasing attention as possible indicators of marginal hardware. However, small delay faults on short paths may be undetectable even with advanced timing aware ATPG. Faster-than-at-speed test (FAST) can detect such hidden delay faults, but so far FAST has mainly been restricted to manufacturing test.

2018

Design For Small Delay Test - A Simulation Study

M. Kampmann, S. Hellebrand, Microelectronics Reliability (2018), 80, pp. 124-133

Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test

M. Kampmann, S. Hellebrand, 2018

Extending Aging Monitors for Early Life and Wear-Out Failure Prevention

C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, H. Wunderlich, in: 2018 IEEE 27th Asian Test Symposium (ATS), 2018

DOI

2017

Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test

M. Kampmann, S. Hellebrand, in: 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2017

DOI

X-tolerante Prüfzellengruppierung für den Test mit erhöhter Betriebsfrequenz

M. Kampmann, S. Hellebrand, 2017

2016

X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test

M. Kampmann, S. Hellebrand, in: 25th IEEE Asian Test Symposium (ATS'16), IEEE, 2016, pp. 1-6

DOI

2015

Optimized Selection of Frequencies for Faster-Than-at-Speed Test

M. Kampmann, M. A. Kochte, E. Schneider, T. Indlekofer, S. Hellebrand, H. Wunderlich, in: 24th IEEE Asian Test Symposium (ATS'15), IEEE, 2015, pp. 109-114

DOI

Effiziente Auswahl von Testfrequenzen für den Test kleiner Verzögerungsfehler

S. Hellebrand, T. Indlekofer, M. Kampmann, M. Kochte, C. Liu, H. Wunderlich, 2015

2014

FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects

S. Hellebrand, T. Indlekofer, M. Kampmann, M. A. Kochte, C. Liu, H. Wunderlich, in: IEEE International Test Conference (ITC'14), IEEE, 2014

DOI

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